1. Field of the Invention
The present invention relates to a phase modulator for frequencies higher than 10 GHz. More precisely the invention relates to a phase shifted binary transmission encoder including an exclusive or gate and flip-flops.
The present invention is based on a priority application, EP 02360288.1, which is hereby incorporated by reference.
2. Background
Optical networks face increasing bandwidth demands and diminishing fiber availability. Based on the emergence of the optical layer in transport network optical networks provide higher capacity and reduced cost. As with any new technology, many challenges arise. Higher spectral densities require a modulated signal spectrum to be narrowed to leave room for filtering. Therefore research is conducted on new modulation formats that combine good transmission properties with higher spectral efficiency. The so-called Phase Shifted Binary Transmission (PSBT), based on a combination of amplitude and phase modulation, doubles tolerance to chromatic dispersion and halves the spectrum width of individual channels.
Implementing PBST requires fast phase modulators. As input of a phase modulator a signal coded in phase shifted binary transmission (PSBT) mode is necessary.
In order to realize such modulation fast circuitries are need encoding a binary signal. A phase modulation or phase shift keying is a modulation where frequency and amplitude are both kept constant. However, the phase of the signal is shifted to signify logic 0 and 1.
The encoding principle to be realized by this invention is shown in FIG. 1. There a time diagram is shown illustrating the coding. A binary data stream In-Th has to be encoded into an binary output data stream Out-Th. The output stream has to change its logical value whenever the input stream is on logic 1. The figure shows the encoding of the bit sequence 0100110. The vertical dashed lines frame the duration of an input bit. The “ones” are changing the output level from 1 to 0 or from 0 to 1.
FIG. 2 shows two prior art circuitries for phase shifted binary transmission encoding. An exclusive or gate XOR with feedback normally is used. The feedback signal is to be delayed by exactly one bit length. Such delay either is performed by a delay element ΔT or by a flip-flop FF1 clocked with a frequency corresponding to the bit rate.
The circuit comprising the delay element ΔT illustrates the coding rule. This circuit is not suited for on-chip solutions due to technological delay variations. For discrete realizations the delay has to be adjusted very exactly when the bit-rate is high.
The circuit comprising the two flip-flops FF1 and FF2 being one-edge triggered D flip-flops take the input signal exactly with the raising edge of the clock signal Clk. Due to the delay of the exclusive or gate XOR the second input of the upper flip-flop FF1 is not available at the rising edge time; the past result OUT_FF is stored. This results in a delay of the duration of one bit.
The used one-edge triggered D flip-flops FF1 and FF2 are shown in detail in prior art FIG. 3. There, the symbol with the inputs D and C and the output Q, in the upper right is decomposed using logic gates.
Facing the problem of realizing a fast phase shifted binary transmission one is confronted with prior art circuitries being either are too inexact or too slow. The delay of the feedback is to be very short, but nevertheless quite exact. Delay elements are inexact due to technological variations and flip-flops are too slow.